Tri-State Logic

What is Tri-State?

A tri-state pin is capable of sitting in three distinct physical conditions:

• HIGH (logic 1): The pin is actively driven to VCC.
• LOW (logic 0): The pin is actively driven to GND (0V).
• HIGH IMPEDANCE (Z): The output driver is turned OFF, making the pin electrically disconnected from the circuit.

The third state (Z) means: the pin is electrically isolated from the circuit.

What is High Impedance (Hi-Z)?

When an output pin is set to High Impedance (Hi-Z):

• The internal driving transistors (both PMOS and NMOS) are turned completely OFF.
• The pin does not source voltage to the line, nor does it sink current to ground.
• It behaves physically like it is “not connected” (an open switch).

Because the pin is electrically isolated, the wire is left completely free for other devices on the bus to safely control.

Why Tri-State Exists

If multiple push-pull outputs are wired directly to a single shared signal line, a severe bus conflict occurs immediately if one device attempts to drive the line HIGH while another device drives the line LOW. This creates a virtual short circuit between VCC and GND, damaging hardware. To avoid this conflict, devices connected to the bus must use tri-state outputs. Only one active device drives the line at any given time, while all other inactive devices put their pins into the Hi-Z state.

Simple Analogy

Think of a group of people attempting to coordinate over a single shared telephone line:

• One person speaks (actively driving the signal HIGH or LOW to transmit data).
• All other listeners remain completely silent (sitting in the Hi-Z state, representing electrical disconnection).
• If two people attempt to speak at the exact same instant, their signals collide, rendering the communication line unintelligible (bus conflict / noise collision).

Tri-State Behavior Table

The three physical output pin configurations operate as follows:

Tri-State in Microcontrollers

A microcontroller's general-purpose input/output (GPIO) pins can be configured on-the-fly inside firmware registers into three modes:

• Output HIGH: Pin actively drives VCC.
• Output LOW: Pin actively pulls to GND.
• Input Mode: The internal driving transistors are turned completely OFF. The GPIO pin is placed into a high impedance state to read incoming external voltages safely without loading the bus.

Tri-State and Open Drain Connection

It is important not to confuse tri-state with open-drain outputs:

• Open-Drain: The pin can only actively drive LOW. The HIGH state must be passive via external pull-up resistors.
• Tri-State: The pin can actively drive HIGH, actively drive LOW, or disconnect completely. Tri-state is therefore more general, flexible, and capable of high-speed active drive in bus topologies.

Tri-State in Bus Systems

In shared data buses (like memory data lanes connecting CPUs to RAM/Flash), time-multiplexing is used to coordinate devices:

1. During Cycle 1, Device A turns its tri-state buffer ON to actively drive data onto the bus. Meanwhile, Device B and Device C are disabled and sit in the Hi-Z state.
2. During Cycle 2, control shifts: Device A disables its buffer and goes to Hi-Z. Device B activates its buffer to drive data, while Device C remains in Hi-Z.

This time-sharing architecture prevents bus conflicts and permits safe multi-device data communication over a single bus.

Important Insight

It is vital to understand that Hi-Z is NOT a logic level.

“Hi-Z is an electrical disconnection state, completely distinct from logic HIGH (1) or logic LOW (0).”

Because the line is disconnected in Hi-Z, the actual voltage on the physical wire will float unless actively driven by another active device or biased by passive pull-up or pull-down resistors.

Comparison Table

The differences between standard, open-drain, and tri-state outputs are summarized below: